The present disclosure relates to the field of digital computer systems, and more specifically, to a method for operating translation look-aside buffers (TLBs).
Recent microprocessor architecture allows software to use so called “virtual” (or sometimes called “logical”) addresses to reference memory locations. The memory access itself is done using a “physical” (or sometimes called “absolute”) address. To translate between the two, typically a TLB data structure is involved. The process of translating is sometimes called Dynamic Address Translation (DAT), in particular in the IBM z/Architecture.
TLB purge requests are executed atomically in that a purge request is not suspended once it has been started and it cannot be suspended by TLB lookup/write requests. This avoids the problem that a TLB lookup may hit on a stale entry if a purge would have been suspended. However, purges may take up to 1000 p-clocks. In this time no translations can be done since the purge-engine is blocking the TLB lookup/write pipeline. In a worst case scenario the core does not make any progress until the purge has been finished.